The Conference on Design and Architectures for Signal and Image Processing

TEXPO Graduate Student Research Competition

16 - 18 October, 2019, Montréal, Canada


Wednesday 16 October

8 h – 8 h 30Registration and welcome
1st floor McKay-Lassonde building
8 h 30 – 9 h 30Keynote by professor Chris Pal, Canada CIFAR AI Chair, Professor at Polytechnique Montréal and MILA : “IA algorithm implementation challenges for 2025
Room M-1120
9 h 30 – 10 hBreak
10 h – 12 h

DASIP technical session : Neural networks and artificial intelligence
Room M-1120
Session chair : Yvon Savaria, Polytechnique Montréal

  • Speeding-up CNN inference through dimensionality reduction
    Lucas Fernández Brillet, Nicolas Leclaire, Stéphane Mancini, Sébastien
    Cleyet-Merle, Marina Nicolas, Jean-Paul Henriques and Claude Delnondedieu
  • CNN hardware acceleration on a low-power and low-cost APSoC
    Paolo Meloni, Antonio Garufi, Gianfranco Deriu, Marco Carreras and Daniela
  • POLYCiNN: Multiclass Binary Inference Engine using Convolutional Decision Forests
    Ahmed Medhat Abdelsalam, Ahmed Elsheikh, Jean Pierre David and Pierre
  • Distilling the knowledge in CNN for WCE screening tool
    Thomas Garbay, Orlando Chuquimia, Andrea Pinna, Hichem Sahbi, Xavier Dray and
    Bertrand Granado
12 h – 13 h 30Lunch
12 h 30 – 16 h 30TEXPO Graduate Student Research Competition and DASIP demos
Trottier Atrium, 3rd floor, McKay-Lassonde building
17 h – 19 hTEXPO awards cocktail
1st floor, McKay-Lassonde building

Thursday 17 October

8 h – 8 h 30Registration and welcome
1st floor McKay-Lassonde building
8 h 30 – 9 h 30Keynote by Jean Bélanger, Co-founder, CEO and CTO of OPAL-RT.
The importance of FPGAs for the Real-Time Simulation of Micro-Grid and Distributed Energy Generation Systems and Electrical Vehicles
Room M-1120
9 h 30 – 10 hBreak
10 h – 12 h

DASIP technical session : Architectures and High Level Synthesis
Room M-1120
Session chair : Andrea Pinna, Sorbonne Université

  • Run-time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors
    Rafail Psiakis, Angeliki Kritikakou, Olivier Sentieys and Emmanuel Casseau
  • Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore Systems
    Simei Yang, Sebastien Le Nours, Maria Mendez Real and Sebastien Pillement
  • Hybrid Prototyping Methodology for Rapid System Validation in HW/SW Co-Design
    Arief Wicaksana, Amir Charif, Caaliph Andriamisaina and Nicolas Ventroux
  • FPGA-Based Acceleration of Expectation Maximization Algorithm using High-Level Synthesis
    Mohammad Abdul Momen, Mohammed A.S. Khalid and Mohammad Abdul Moin Oninda
12 h – 13 h 30Lunch
13 h 30 – 17 h 30

Synopsys ASIP Designer workshop
Room M-1120
– David Florez, Corporate Application Engineer, Synopsys Inc.
– Steven Van Rompaey, Corporate Application Engineer, Synopsys BVBA.

  • Getting started … Application-specific processors (ASIPs) in system-on-chip design: market and technology trends
  • Case study : Designing an ASIP for SHA256 secure hashing, starting from a RISC-V ISA specification (including tool demonstation)
  • Break
  • Case study : Designing Application-Specific Processors for Deep Learning Acceleration (including tool demonstration)
  • Case study : Minimum Mean Square Error (MMSE) Equalization in 5G New Radio
19 h 30 – 22 hDASIP social event :
L’Auberge Saint-Gabriel, 426 St-Gabriel Street, metro Champ-de-Mars.

Friday 18 October

8 h – 8 h 30Registration and welcome
1st floor McKay-Lassonde building
8 h 30 – 9 h 30Keynote by Mounir Boukadoum, Professor at UQAM and ReSMiQ Director.
Artificial intelligence in engineering analysis and design, prospects and challenges
Room M-1120
9 h 30 – 10 hBreak
10 h – 12 h

DASIP technical session : Architectures and algorithms for vision and image processing
Room M-1120
Session chair : Emmanuel Casseau, Université de Rennes I

  • A New Real-Time Embedded Video Denoising Algorithm
    Andrea Petreto, Thomas Romera, Florian Lemaitre, Ian Masliah, Boris Gaillard, Manuel
    Bouyer, Quentin Meunier and Lionel Lacassagne
  • Real-time implementation of adaptive correlation filter tracking for 4K video stream in Zynq UltraScale+ MPSoC
    Marcin Kowalczyk, Dominika Przewłocka and Tomasz Kryjak
  • Using Time-of-Flight Sensors for People Counting Applications
    Michal Stec, Viktor Herrmann and Benno Stabernack
  • SparseCCL: Connected Components Labeling and Analysis for sparse images
    Arthur Hennequin, Ben Couturier, Vladimir V. Gligorov and Lionel Lacassagne
12 h – 13 h 30Lunch


Prospective authors are invited to submit manuscripts on topics including, but not limited to:

Design Methods and Tools

  • Design verification and fault tolerance
  • Embedded system security and security validation
  • System-level design and hardware/software co-design
  • High-level synthesis, logic synthesis, communication synthesis
  • Embedded real-time systems and real-time operating systems
  • Rapid system prototyping, performance analysis and estimation
  • Formal models, transformations, algorithm transformations and metrics

Development Platforms, Architectures and Technologies

    • Embedded platforms for multimedia and telecom
    • Many-core and multi-processor systems, SoCs, and NoCs
    • Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems
    • Memory system and cache management
    • Asynchronous (self-timed) circuits and analog and mixed-signal circuits

Custom embedded architectures and systems

  • Deep learning architectures for inference and training
  • Systems for autonomous vehicles : cars, drones, ships and space applications
  • Smart cameras, security systems, behaviour recognition
  • Data Center processing : special routing, configurable co-processors and low energy considerations
  • Real-time cryptography, secure computing, financial and personal data processing
  • Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio-inspired computing
  • Biological data collection and analysis, bioinformatics
  • Personal digital assistants, natural language processing, wearable computing and implantable devices
  • Global navigation satellite and inertial navigation systems

About the event

The Conference on Design and Architectures for Signal and Image Processing (DASIP) provides an inspiring international forum for the latest innovations and developments in the field of leading edge embedded signal processing systems.

The conference program includes keynote speeches, contributed paper sessions, a full afternoon of project demonstrations in conjunction with the 2019 TEXPO Graduate Student Research Competition, and an afternoon workshop offered by Synopsys on the design of Application-Specific Instruction-set Processors (ASIPs).


Pavillons Lassonde
Polytechnique Montreal
2500, chemin de Polytechnique
Montréal, Qc, Canada, H3T 1J4


October 16-18, 2019 Wednesday to Friday


Polytechnique Montréal is served by the Université de Montréal métro station on the blue line. Downtown hotels near an orange line métro station will require a transit of approximately 40 minutes. Bus service from downtown can be faster with a transit of approximately 30 minutes.

Hotel Terrasse Royale is located a 16 minute walk away from Polytechnique. At the time of registration, clearly state that you are attending DASIP 2019 in order to benefit from a corporate discount price :

Important dates

(all 23:59 A.O.E.)
Paper submission deadline: June 5th, 2019 * extended deadline *
Notification of acceptance: July 12th, 2019
Camera ready papers: September 6th, 2019
DASIP Demos 1-page abstract submission: September 16th, 2019
Conference: October 16th-18th, 2019

DASIP Demos and TEXPO Graduate Student Research Competition

DASIP Demos is the demonstration track of DASIP. It is an excellent opportunity for researchers and users to interactively demonstrate their hardware platforms, prototypes and tools. This live presentation can show early implementation or more mature tools, platforms and prototypes.
Whereas a regular research paper points out the scientific contribution of a new embed signal processing architecture or tool, a demonstration paper provides the opportunity to show how a scientific contribution has been transferred into a working platform or a in a tool.
Authors of regular research papers are thus encouraged to submit an accompanying demonstration paper.

DASIP Demos will be held in conjunction with the TEXPO Graduate Student Research Competition.

Paper Submission

All submissions must be made online using the following link :

Authors must submit a 150-300 abstract of their papers through the web based submission system by the required date. The abstract submission will allow the program committee to plan and begin the review process more quickly, allowing a faster feedback to the authors. The full paper submission is later made by uploading the paper with the same account.

Submissions must be fully anonymous, but authors should not hide previous work, instead, they need to make self-references in third person.

Papers must be submitted in PDF in IEEE double-column format following the IEEE templates. Regular papers must be no longer than 6 pages and Demo Night paper are restricted to two pages. Submitted papers must describe original unpublished work and must not be under consideration for publication elsewhere.

Each submission will receive at least three independent double blind reviews from the members of our scientific committee. Authors of accepted papers must address those comments in the camera ready version and present it in the conference prior to its publication.

The conference proceedings will be published in the IEEE Xplore Digital Library. Paper and keynote presentation slides and tutorial documents will be made available to conference attendees after the conference (subject to confidentiality issues). Authors of the best papers may be invited to submit an extended version of their work to an international journal.


Polytechnique Montreal

Polytechnique is more than a teaching establishment; it is the benchmark in engineering, with high-quality teaching and research activities that continually push the limits of knowledge.

Founded in 1873, Polytechnique Montréal is one of Canada’s leading engineering teaching and research institutions. It is the largest engineering university in Québec for the size of its graduate student body and the scope of its research activities.



Polytechnique Montreal

Pavillons Lassonde
2500, chemin de Polytechnique
Montréal, Qc, Canada, H3T 1J4

Our sponsors

Institutional Sponsors

Technical Co-sponsorship

Industrial sponsorships


Organizing Committee

  • Pierre Langlois, Polytechnique Montréal, CA, general co-chair
  • Bertrand Granado, Université Pierre et Marie Curie, FR, general co-chair
  • Séabstien Pillement, Université de Nantes – IETR, FR,  technical program co-chair
  • Jean Pierre David, Polytechnique Montréal, CA, technical program co-chair
  • Réjean Lepage, Polytechnique Montréal, CA, web chair
  • Éric Legua, Polytechnique Montréal, CA, conference logistics consultant and publication chair

Steering Committee

  • João M. P. Cardoso, University of Porto / INESC TEC, PT
  • Emmanuel Casseau, University of Rennes 1, FR
  • Diana Goehringer, TU Dresden, DE
  • Guy Gogniat, Université de Bretagne Sud, FR
  • Marek Gorgon, AGH University of Science and Technology, PL
  • Bertrand Granado, Université Pierre et Marie Curie, UPMC), FR
  • Michael Hübner, Ruhr-Universität Bochum, DE
  • Pierre Langlois, Polytechnique Montréal, CA
  • Jean-François Nezan, INSA Rennes, FR
  • Sebastien Pillement, Polytech’Nantes, FR

Register now

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